Rohde & Schwarz FPL1000 Manuel D'utilisation page 572

®
R&S FPL1000
Bit No.
8
9 to 14
15
9.2.2.10 STATus:QUEStionable:LIMit register
The STATus:QUEStionable:LIMit register contains information about the results of a
limit check when you are working with limit lines.
A separate LIMit register exists for each active channel and for each window.
You can read out the register with
or STATus:QUEStionable:LIMit<n>[:EVENt]?.
Table 9-10: Meaning of the bits used in the STATus:QUEStionable:LIMit register
Bit No.
0
1
2
3
4
5
6
7
8 to 14
15
9.2.2.11 STATus:QUEStionable:LMARgin register
This register contains information about the observance of limit margins.
Manuel d'utilisation 1179.5860.09 - 12
Meaning
EXTernalREFerence
This bit is set if you have selected an external reference oscillator but did not connect a useable
external reference source.
In that case the synthesizer can not lock. The frequency in all probability is not accurate.
Not used
This bit is always 0.
Meaning
LIMit 1 FAIL
This bit is set if limit line 1 is violated.
LIMit 2 FAIL
This bit is set if limit line 2 is violated.
LIMit 3 FAIL
This bit is set if limit line 3 is violated.
LIMit 4 FAIL
This bit is set if limit line 4 is violated.
LIMit 5 FAIL
This bit is set if limit line 5 is violated.
LIMit 6 FAIL
This bit is set if limit line 6 is violated.
LIMit 7 FAIL
This bit is set if limit line 7 is violated.
LIMit 8 FAIL
This bit is set if limit line 8 is violated.
Unused
This bit is always 0.
Network operation and remote control
STATus:QUEStionable:LIMit<n>:CONDition?
Status reporting system
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