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~VMIQl~1Rl
A727
3
.
4
SYNC BOARD 1.769.440
The
following
circuits are implemented
on
the
SYNC
BOARD
:
• MASTER/SLAVE synchronization
• Start on modulation
3
.
4
.
1
~ASTERISLAVE
synchronization
-----------------------
->
Fig
.
3.9
The
synchronization section of the SYNC SOARD
permits
synchronization to an external word clock (WCLK IN).
The
latter
can be
fed
into the 8NC socket CLOCK IN (30) as a
square-wave frequency of 44.1 kHz +10X
I
-3DX,
5 vpp
to
10 Vpp
.
By
means
of the SYNC signal the microprocessor
selects
between MASTER or SLAVE operation.
11 no signal is available on the CLOCK IN [30)
input,
the
microprocessor switches automatically to MASTER mode. The
.resettable,
monostable
muLtivibrator (IC14) detects the
absence
of a signal and sets the MOOSEl signal
to
"H".
The
oscillator,
implemented with the quartz
Y1
and
an
EXOR
gate,
can now oscillate.
The
multipLexer
(IC10)
transmits
the quartz signal as the system clock
<XSYS).
The transistor Q1 becomes conductive, so that
t~e
invert-
ing input of the comparator (IC18)
is
pulled to "H",
and
the
voltage-controlled
oscilLator (Ie17) is
stopped
in
order to prevent maLfunctions.
The microprocessor switches the SYNC signal to low. If at
the
same time a WCLK IN signal
is
dete~ted
that has been
brought
by the microprocessor to TTL tevel,
the
MODSEL
signal changes to "L", oscillator
(Y1)
stops,
~nd
tranSi-
stor
01
is switched off. The SLAVE mode is now enabled.
From
the DOSM signal,
the own,
current,
digitaL
word
clock
(DwCK)
is generated in le11 and
lC12,
and
made
available
for
(additional) SLAVE machines
on
the
BNC
socket
\LOCK OUT
(}1]
as the absolutely synchronous WClK
OUT signal.
The
phase comparator (IC16) suppLies a
5quare-~ave
vol-
tage
that is equivalent to the phase shift of the
input
Signals DWCK and WClK IN.
The filtered voltage which has
been
averaged
by
the
compar~tor
IC18,
controls
the
voltage-controlled oscillator (,C17) via the variable ca-
pacitance diode (D2)
.
The signal converted by the voLtage comparator (IC13)
is
transmitted by the multipLexer
(1(10)
as the system clock
(XSYS).
3.4 2 Start on moduLation
->
Fig. 3,9
The
mOdulation start
c;~cuit
supplies
a signal to
the
microprocessor
~henever
the audiO Information of the
CD
play~r
exceeds a predefined threshold level. The start of
a selectiOn can thus be piopointed and the locate address
set correspondingly.
The circuit i5 Limited to detecting
levels
that positive-
_y e>ceed the threshold by
-5~
d8
.
with
the
posit ive gOing cLock edge
(elK)
the
threshOld
reterence data are read
by
the
serial
DATA signal ioto an
8-bit Shift regi ster
.
A pOSitive going edge on the enable
input (IC1,
pin12) causes the eight received bits to
be
stored
.
The
digital
infor~atioo
lLow oi the CD player (OAAB)
is
in
the I'S lormat and must be cooverted before it can be
pro,e5sed
.
10
this two
'
s
comple~ent
representation
the
most
significant
bit (MSB) contains the sign which
IS
essentiaL tor
correct
detection 01 the threshold value.
Since only the range -66 dB to -18
d6
is of interest
lor
detecting the modulation start, it sulflces to detect and
store
the most significant bit (MSS) containing the sign
as well as bits 5 through 12.
E 3/8"
"' : ""
¥.
Fig. 3.9
with
the POSitive going edge (CLAS),
the
serial
audiO
data
(OAAB) are read into an 8-bit shift register (1(4).
On the series output, the MSB
1S
shilted out at the shift
register and finally stored in the flip-flop (1(6).
With
the
positive
going clock edge
«(lAB>,
the
word
select
signaL
<wSAB)
is
read into a third
8-bit
shift
register
(le7)
and shifted via the output of the
eighth
stage into an additional a-bit Shift register
(r(5) ~hich
is
cloc~ed
by the
Inve~ting
clock signal.
Three
latch
signals are produced via three
EXOR
gates
(Ie3).
The
Signal on IC3,
pin11 stores the MSB in
the
flip-flop (IC6),
the signal on IC3 pin6 stores the eight
relevant bits 5 through
12
in Shift register IC4.
The third Latch signal (1C3,
pln8) triggers the
~onoflop
(IC1~),
provided output
"A"
(1(14, pin9) 01 the latter's
Log
.
"L".
IC2 is a comparator for the two 8-bit words P and
Q.
As
tong
as the actual value a is greater than the reterence
vaLue
P,
output 1C2, pinl supplies a signal that is Log
.
"H",
and is supplied to the microprocessor as the MODOET
Signal.
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