Device Profile; Memory Address Space Mapping - Balluff BTL6-V11V-M A1-S115 Serie Notice D'utilisation

BTL6-V11V-M _ _ _ _ -A1-S115
Micropulse AT Transducer in round profile housing
6

Device profile

6.1 Device profile
The VARAN bus is an industrial real-time bus system based
on the IEEE 802.3 100TX Standard Ethernet technology.
6.1.1

Memory address space mapping

The registers are assigned to following memory spaces:
Address (hex) Description
0000 Status
Bit 0: Error
Bit 1: Busy
Bit 3 to 2: Reserved
Bit 6 to 4: Stop detected
Bit 7: Stop overflow
Bit 31 to 6: Reserved
0004 Result position 1
0008 Result position 2
000C Result position 3
0010 Result position 4
003C Config
Bit 2 to 0: Num of magnets
Bit 31 to 3: Reserved
Tab. 6-1: Memory assignment
Description of Status register:
– Error: This bit is set if the number of detected stops is
less than the number of magnets entered in the Config
register.
– Busy: This bit is always 0.
– Stop detected: This bit field indicates the number of
magnets. For example, "001" means that 1 stop was
detected.
– Stop overflow: This bit is mapped if the number of
detected stops is more than the number of magnets
entered in the Config register.
– Reserved bits (bit 2, bit 3) in LSB are always 0.
10 english
Size (byte) Format
4 bit
4 dword
4 dword
4 dword
4 dword
4 bit
Description of Config register:
– Num of magnets: This bit field must be set to the
number of magnets installed on the BTL. For example,
"001" means that 1 magnet was installed.
The default value is 1 magnet. The maximum can be
read out from the DO calibration data (see configuration
guide).
Dimension Access type
r
inc r
inc r
inc r
inc r
r/w
Reset
0
0
0
0
0
1