Publicité
MAIN BOARD INTERFACE - INTERFACE MAIN BOARD - SCHALTBILD MAIN BOARD - SCHEMA DELLA MAIN BOARD INTERFAZ MAIN BOARD
( MAIN BOARD 6/11-30")
P3
GFBK
P3
H19
GCL K
GCLK
P2
G20
H17
G PEN
GPENSOG
GFBK
P3
J17
H18
GVS
GVS
GREF
P3
G19
F19
GHSS OG
GHS
GBLKSPL
F20
GCOAST
GRE[0. .7]
GRE0
M20
U16A
GRE0
P3
N19
GRE1
GRE1
GRE2
N18
PW166B-10T
GRE2
N17
GRE3
GRE3
GRE4
N20
GRE4
P20
GRE5
GRE5
GRE6
P19
GRE6
R20
GRE7
GRE7
GG E[0..7 ]
F18
GGE0
GGE0
P3
GGE1
E19
GGE1
GGE2
E20
GGE2
GGE3
J18
GGE3
GGE4
H20
GGE4
GGE5
J19
GGE5
GGE6
J20
GGE6
GGE7
K19
GGE7
GB E[0..7 ]
GBE0
D16
GBE0
P3
GBE1
A18
GBE1
GBE2
C17
GBE2
GBE3
B18
GBE3
GBE4
A19
Graphics Port
GBE4
GBE5
B19
GBE5
GBE6
A20
GBE6
GBE7
D18
GBE7
K20
GRO0
L17
GRO1
L18
GRO2
L19
GRO3
L20
GRO4
M18
GRO5
M17
GRO6
M19
GRO7
E17
GGO0
C19
GGO1
B20
GGO2
C20
GGO3
E18
GGO4
F17
GGO5
D19
GGO6
D20
GGO7
B15
GBO0
A16
GBO1
C15
GBO2
D15
GBO3
B16
GBO4
A17
GBO5
C16
GBO6
B17
GBO7
VCPU25
V25P
VCPU33
R8 2
27
L14
42 OH M
U16E
PW166B-10T
Power and Ground
P7,P9
RESE T
+5VS
U18
SW1
3
1
C128
1
5
NC
VDD
0.1U
25 V K
2
VSS
4
5
2
R8 7
470
3
4
NC
RES
R8 8
V6300L
1K
LCD03B
First issue 04 / 04
[P .6]
RESE T
R6 8
X607
TP 27
C9 9
P3
18P
14 .318M HZ
GBLKSPL
P3
50V J
GCOAST
VCPU 33
V33
[P .1]
RX
[P .1]
TX D
IRRCVR_3V
[P .6]
SD A_CP U
SC L_CPU
VCPU 33
SD A2
SC L2
P2
LCD_ON
P1 0
PW R_ ON
Q23
P3
LV DS_E N
2N3 904
R7 4
10K
[P .7]
C1 01
LCD_BR
2.2U K
R 193
16V
100
P6
D12
VCL K
VCLK
[P .7]
VR[0..7 ]
P6
C13
VPEN
VPEN
P6
A14
VVS
VVS
P6
B14
VH S
VHS
P5
A15
VFI EL D
VFIELD
VG[0 ..7]
U16B
P6
VG0
D8
VY0
VG1
C8
PW166B-10T
VY1
VG2
B7
VY2
VG3
A7
VY3
VCPU 33
VG4
B8
VY4
VG5
D9
Graphics Port
VY5
VG6
C9
VY6
VG7
R7 5
A8
VY7
R7 6
VB[ 0..7]
VB0
B9
R7 7
VUV0
P6
VB1
A9
VUV1
VB2
B10
VUV2
R7 8
VB3
A10
VUV3
VB4
D11
VUV4
VB5
A11
VUV5
VB6
C12
VUV6
VB7
B13
VUV7
NO TE : U pon reset, the on-board A/ D
and video decoder will be tri-stated.
V3P
VCPU33
V33
C1
0.1U Z
U33
8
1
VCC
NC
7
2
SC L
SCL1
SCL0
6
3
SDA1
SDA0
5
4
EN
GND
PCA9515DP
SD A
I2C_EN ABLE
VCPU33
VCC
C2
0.1U Z
U34
8
1
VCC
NC
7
2
SCL_5V
SCL1
SCL0
6
3
SDA1
SDA0
VCPU33
5
4
EN
GND
PCA9515DP
SD A_5V
I2C_EN ABLE
TP 24
TP25
P1
A0
E3
P2
RESET
A1
NC_R06 03
N3
A2
N4
A3
Y1
W1 3
R1
MCKEXT
A4
X608
Y13
R2
DCKEXT
A5
C 100
T1
A6
18P
P3
T2
XTALI
A7
50V J
P4
R3
XTALO
A8
U1
A9
U2
A10
R7 0
470
RXD
C1
R4
RXD
A11
TX D
D3
T3
TXD
A12
R7 3
10K
V1
A13
E4
W1
IRRCVR0
A14
TP 28
D2
V2
IRRCVR1
A15
T4
A16
SD A_CP U
C2
U3
PORTA0
A17
SC L_CPU
B1
Y1
PORTA1
A18
B2
W2
PORTA2
A19
A1
PORTA3
C4
F4
PORTA4
D0
D5
F3
PORTA5
D1
B3
E1
PORTA6
D2
PW M_BR
A2
F2
PORTA7
D3
F1
D4
VR 0
A3
G2
PORTB0
D5
VR 1
Misc
C5
G1
PORTB1
D6
VR 2
D6
H1
PORTB2
D7
VR 3
B4
H4
PORTB3
D8
VR 4
A4
H3
PORTB4
D9
VR 5
C6
H2
PORTB5
D10
VR 6
B5
J1
PORTB6
D11
VR 7
A5
J2
PORTB7
D12
J4
D13
J3
D14
U16D
K1
D15
PW166B-10T
M3
RD
M4
WR
N2
BHEN
M1
ROMOE
L2
ROMWE
L1
RAMOE
TP 33
TM S
D13
K2
CPUTMS
RAMWE
TP 35
TCK
A6
M2
CPUTCK
CS0
N1
CS1
TP 36
TD O
W3
CPUTDO
4.7K
A13
E2
MODE0
EXTINT
NC_R06 03
U5
MODE1
4.7K
B6
MODE2
D1
NMI
4.7K
R8 1
NC_R0603
R8 0
0
R7 9
NC_R0603
MAIN BOARD
VCPU33
U17
C102
AT24C1616K
0.1U
25 V K
8
1
VCC
NC
7
2
WP
NC
SCL _CPU
6
3
SCL
NC
SDA_ CP U
5
4
SDA
GND
+
C 116
SCL _CPU
100U
16V
SDA_ CP U
SCL _CPU
SDA_ CP U
TP 26
A[1..19]
A1
[P .6]
A2
A3
W12
DCL KR
DCLK
A4
V13
DVS
A5
U13
DHS
A6
Y13
DCKEXT
A7
Y15
DEN
A8
A9
A10
R19
DR0
DRE0
A11
T20
DR1
DRE1
A12
R18
DR2
DRE2
A13
R17
DR3
DRE3
A14
T18
DR4
DRE4
A15
U19
DR5
DRE5
A16
T17
DR6
DRE6
A17
V20
DR7
DRE7
A18
A19
U18
DG0
DGE0
V19
DG1
D[0..15]
DGE1
D0
W20
DG2
DGE2
[P .6]
D1
W19
DG3
DGE3
D2
DG4
Y20
DGE4
D3
V17
DG5
DGE5
D4
DG6
U16
DGE6
D5
W18
DG7
DGE7
D6
D7
Y19
DB 0
DBE0
D8
DB 1
Y18
DBE1
D9
V16
DB 2
DBE2
D1 0
DB 3
U15
DBE3
D1 1
Display Port
Y16
DB 4
DBE4
D1 2
DB 5
V15
DBE5
D1 3
W16
DB 6
DBE6
D1 4
DB 7
W15
DBE7
D1 5
Y12
DRO0
R D n
TP 29
W11
DRO1
W R n
TP 30
Y11
DRO2
TP 31
U10
DRO3
[P .6]
V10
RO MO En
DRO4
[P .6]
W10
RO MW En
DRO5
TP 32
Y10
DRO6
TP 34
W9
DRO7
[P .6]
CS 0n
CS 0n
CS 1n
[P .6]
Y9
CS 1n
DGO0
W8
DGO1
V8
DGO2
U8
DGO3
Y8
DGO4
Y7
DGO5
[P .6]
W7
NMI
DGO6
Y5
DGO7
V6
DBO0
U6
DBO1
W5
DBO2
Y4
DBO3
V5
DBO4
Y3
DBO5
V4
DBO6
Y2
DBO7
C103
C104
C105
C106
C107
C108
C109
C110
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
25 V K
25 V K
25 V K
25 V K
25 V K
25 V K
25 V K
25 V K
VCPU25
C117
C118
C119
C120
C121
C122
C123
C124
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
0.1U
25 V K
25 V K
25 V K
25 V K
25 V K
25 V K
25 V K
25 V K
C9 7
C9 8
22 P
22P
50 V J
50 V J
P8
R6 9
0
DC LK
DC LK
RVS
P8
RV S
P8
RHS
RHS
P8
RDE
RDE
DR[0. .7]
P8
DG [0..7]
P8
DB [0..7]
P8
V3P
C111
C112
0.1U
0.1U
25 V K
25 V K
VCPU25
C125
C126
C127
0.1U
0.1U
0.1U
25 V K
25 V K
25 V K
Publicité
