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INTEGRATED CIRCUITS BLOCK DIAGRAMS - SYNOPTIQUES INTERNES DES CIRCUITS INTEGRES -
SCHEMA A BLOCCHI DEL CIRCUITI INTEGRATI - VISTA INTERNA DE LOS CIRCUITOS INTEGRADOS
SMALL SIGNAL BOARD - PLATINE PETITS SIGNAUX - SIGNAL-PLATINE -
RI1
GI1
30
31
32
RGB/YUV-
MATRIX
Y
U
28
LUMIN
27
UIN
SWITCH
26
VIN
10
SCL
IIC-BUS
TRANSCEIVER
11
SDA
23
VD
24
HD
CLOCK
GENERATION
+1st LOOP
12
HSEL
21
20
XTALO
XTALI
INTEGRIERTE SCHALTUNGEN BLOCKSCHALTBILDER
PIASTRA PICCOLI SEGNALI - PLACA PEQUEÑA SEÑAL
BI1
BL1
DIGSUP
33
7
BLACK
STRETCH
V
BL
Y
R
SATURATION
CONTROL
U
G
COLOUR DIFF.
MATRIX
V
B
SATURATION
IV200
TDA9330H
PHASE-2
LOOP
9
13
14
6
SANDC
HFB
DPC
GND
LUMINANCE
PROCESSING
BLACK STRETCH
HISTOGRAM
GAMMA CONTROL
Y
6
YIN
8
INPUT
UIN
STAGE
9
VIN
Y
NC
24
NC
23
NC
13
NC
12
NC
2
TP
10
SC
1
WINDOW
GENERATION
www.rtv-horvat-dj.hr
IV200 - TDA9330H
DECBG
VP
VP
RI2
GI2
18
17
39
35
36
37
SUPPLY
R
G
R
G
RGB
CONTRAST
INSERTION
CONTROL
B
CONTRAST
SOFT
START/STOP
H/V DEVIDER
LOW-POWER
START-UP
RAMP
HORIZONTAL
GENERATOR
OUTPUT
8
5
22
15
HOUT
FLASH
LPSTUP
VSC
IV100 - TDA9178
VCC
DECDIG
20
15
SPECTRAL
PROCESSING
Y
DELAY
Y
SMART PEAKING
CONTR.
CTI
U,V
U,V
U
U
COLOUR
COLOUR
VECTOR
PROCESSING
PROCESSING
SKIN TONE
V
V
GREEN ENH.
SATURATION
BLUE STRETCH
CORRECTION
NOISE
MEASURING
IIC-BUS
CONTROL
FEATURE
MODE
DETECT
cue flash
ADC
5
3
4
ADEXT1 ADEXT2 ADEXT3
BI2
BL2
BCL
PWL
FBCSO
38
43
34
29
PWL+
BCL
B
BL
R
R
WHITE POINT+
G
G
BRIGHTNESS
CONTROL
B
B
BRIGHTNESS
WHITE POINT
GEOMETRY CONTROL
VERTICAL
GEOMETRY
16
19
1
2
IREF
GND
VDRIVEA
VDRIVEB
SOUT
21
LTI / VDC
CDS
Y
19
YOUT
U
OUT -
17
PUT
UOUT
STAGE
V
16
VOUT
11
SCL
14
SDA
7
ADR
22
CF
18
VEE
44
CONTINUOUS
BLCIN
CATHODE
CALIBRATION
40
ROUT
OUTPUT AMPLIFIER
41
GOUT
+BUFFER
BLUE STRETCH
42
BOUT
25
DACOUT
19x6-BIT DAC's
4
EHTIN
EW-GEOMETRY
3
EWOUT
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Table des Matières
