▶
Advance DRAM Configuration
Press <Enter> to enter the sub-menu.
▶
DRAM Timing Mode
This field has the capacity to automatically detect all of the DRAM timing.
▶
DRAM Drive Strength
This item allows you to control the memory data bus' signal strength. Increasing the
drive strength of the memory bus can increase stability during overclocking.
▶
DRAM Advance Control
This field has the capacity to automatically detect the advanced DRAM timing. If you
set this field to [DCT 0], [DCT 1] or [Auto], some fields will appear and selectable.
▶
1T/2T Memory Timing
This item controls the SDRAM command rate. Select [1T] makes SDRAM signal
controller to run at 1T (T=clock cycles) rate. Selecting [2T] makes SDRAM signal
controller run at 2T rate.
▶
DCT Unganged Mode
This feature is used to Integrate two 64-bit DCTs into a 128-bit interface.
▶
Bank Interleaving
Bank Interleaving is an important parameter for improving overclocking capability of
memory. It allows system to access multiple banks simultaneously.
▶
Power Down Enable
This is a memory power-saving technology. When the system does not access mem-
ory over a period of time, it will automatically reduce the memory power supply.
▶
MemClk Tristate C3/ATLVID
This setting allows you to enable/disable the MemClk Tristating during C3 and
ATLVID.
▶
FSB/DRAM Ratio
This item allows you to select the ratio of FSB/ DRAM.
▶
Adjusted DRAM Frequency (MHz)
It shows the adjusted Memory frequency. Read-only.
▶
HT Link Control
Press <Enter> to enter the sub-menu.
▶
HT Incoming/ Outgoing Link Width
These items allow you to set the Hyper-Transport Link width. Setting to [Auto], the
system will detect the HT link width automatically.
▶
HT Link Speed
This item allows you to set the Hyper-Transport Link speed. Setting to [Auto], the sys-
tem will detect the HT link speed automatically.
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