Asus MAXIMUS VII GENE Mode D'emploi page 100

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DRAM READ to PRE Time [Auto]
Options de configuration : [Auto] [1] – [15]
DRAM FOUR ACT WIN Time [Auto]
Options de configuration : [Auto] [1] – [255]
DRAM WRITE to READ Delay [Auto]
Options de configuration : [Auto] [1] – [15]
DRAM CKE Minimum Pulse Width [Auto]
Options de configuration : [Auto] [1] – [15]
DRAM CAS# Write Latency [Auto]
Options de configuration : [Auto] [1] – [31]
RTL IOL control
DRAM RTL Initial Value [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHA_R0D0) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHA_R0D1) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHA_R1D0) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHA_R1D1) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHB_R0D0) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHB_R0D1) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHB_R1D0) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM RTL (CHB_R1D1) [Auto]
Options de configuration : [Auto] [1] - [63]
DRAM IO-L (CHA_R0D0) [Auto]
Options de configuration : [Auto] [1] - [15]
DRAM IO-L (CHA_R0D1) [Auto]
Options de configuration : [Auto] [1] - [15]
DRAM IO-L (CHA_R1D0) [Auto]
Options de configuration : [Auto] [1] - [15]
DRAM IO-L (CHA_R1D1) [Auto]
Options de configuration : [Auto] [1] - [15]
3-16
Chapitre 3 : Le BIOS

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Maximus vii impact

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