Chipset - Asus A8V-E Deluxe Mode D'emploi

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Chipset

Chipset Chipset Chipset Chipset
Advanced
DRAM Configuration
Upstream LDT Bus Width
Downstream LDT Bus Width
LDT Bus Frequency
VLink Mode Selection
PEG Data Scrambling
PE0-PE3 Data Scrambling
Init Display First
Chipset Vcore Adjustment
↑↓ ↑↓
↑↓ : Select Item ↑↓ ↑↓
F1:Help
→← →← →←: Select Menu →← →←
ESC: Exit
DRAM Configuration DRAM Configuration DRAM Configuration DRAM Configuration DRAM Configuration
Les éléments de ce sous-menu affichent les informations liées à la DRAM
telles qu'auto-détectées par le BIOS.
Advanced
Current DRAM Frequency
Max Memclock (MHz)
CAS# latency (Tcl)
RAS# to CAS# delay
Min RAS# active time(Tras)
Row precharge Time
Master ECC Enable
↑↓ : Select Item ↑↓ ↑↓ ↑↓ ↑↓
F1:Help
→← →← →← →← →←: Select Menu
ESC: Exit
Current DRAM Frequency
Affiche la fréquence. Cet élément n'est pas configurable.
Max Memclock (MHz) [Auto]
Affiche la fréquence d'opération maximale.
Options de configuration: [Auto] [DDR200] [DDR266] [DDR333]
[DDR400]
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Phoenix-Award BIOS CMOS Setup Utility
Chipset
[16 bit]
[16 bit]
[Auto]
[By Auto]
[Auto]
[Enable]
[PCI Slot
[+1.6 V]
-/+: Change Value
Enter: Select Sub-menu
Phoenix-Award BIOS CMOS Setup Utility
DRAM Configuration
166 MHz
[Auto]
[Auto]
(Trcd) [Auto]
[Auto]
(Trp) [Auto]
[Enabled]
-/+: Change Value
Enter: Select Sub-menu
Select Menu
Item Specific Help
DRAM timing and
control
F5: Setup Defaults
F10: Save and Exit
Select Menu
Item Specific Help
Place an artificial
memory clock limit on
the system. Memory is
prevented from
running faster than
this frequency.
F5: Setup Defaults
F10: Save and Exit
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